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Signal Integrity Solution for High Speed Digital 华体会体育·(中国)股份有限公司官网 Design
29Nov
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Signal Integrity Solution for High Speed Digital 华体会体育·(中国)股份有限公司官网 Design

Signal Integrity Solution for High Speed Digital 华体会体育·(中国)股份有限公司官网 Design
p> With the increase of IC output switch speed and 华体会体育·(中国)股份有限公司官网 density, signal integrity has become one of the key issues in high-speed digital communication Component parameters and 华体会体育·(中国)股份有限公司官网 boards, as well as component layout 华体会体育·(中国)股份有限公司官网 boards, high-speed signal line routing and other factors will lead to signal integrity problems
For 华体会体育·(中国)股份有限公司官网 layout, signal integrity requires to provide circuit board layout that does not affect signal timing or voltage, but for circuit wiring. Signal integrity requires to provide terminal components, placement strategies, and routing information The wrong placement of the high signal Speed 华体会体育·(中国)股份有限公司官网 and terminal components on the, or the incorrect wiring of the high speed signal may lead to signal integrity problems, which may lead to incorrect data output by the system, abnormal circuit operation, or even failure to work at all It has become a research hotspot to fully consider the factors of signal integrity and take effective control measures in the design process
1.. Signal integrity issues
Good signal integrity means that the signal responds with the correct timing and voltage level values when needed.  Conversely, when the signal does not respond correctly, a signal integrity problem occurs Signal integrity problems may cause or directly cause signal distortion, timing error, wrong data, address and control lines, system failure, or even system crash It is caused by multiple factors Incorrect switching speed of IC, incorrect placement of terminal components, or incorrect routing of high-speed signals will lead to signal integrity problems The main signal integrity problems include: delay, reflection, synchronous switch noise, oscillation, ground bounce, crosstalk, etc
2.......... Definition of Signal Integrity
Signal integrity refers to the ability of the signal to respond with the correct timing and voltage in the circuit.  This is a signal undamaged state It teaches the signal quality on the signal line
2.1 Delay
Delay means that the signal is transmitted at a limited speed on the wires of the 华体会体育·(中国)股份有限公司官网 The signal is sent from the transmitter to the receiver, and there is a transmission delay between them The delay of the signal will affect the timing of the system. The propagation delay mainly depends on the length of the wire and the dielectric constant of the medium around the wire In high-speed digital system, the length of signal transmission line is a direct factor affecting the phase difference of clock pulse The phase difference of clock pulse refers to two clock signals generated at the same time and their arrival time at the receiver is not synchronized The phase difference of clock pulse reduces the predictability of signal edge arrival If the clock pulse phase difference is too large, the receiver will generate an error signal As shown in Figure 1, transmission line delay has become an important part of the clock cycle
2.2 Reflection
The reflection is the echo on the sub-transmission line.  When the signal delay time (Delay) is much greater than the signal transition time (Transition Time), the signal line must be used as a transmission line When the characteristic impedance of the transmission line does not match the load impedance, part of the signal power (voltage or current) is transmitted to the line and reaches the load, but part of it is reflected If the load impedance is less than the original impedance, the reflection is negative; Otherwise, the response will be positive Geometric changes in the trajectory, incorrect wiring termination, transmission through the connector, and discontinuities in the power plane all cause this reflection
2.3..... SSN
When many digital signals on the 华体会体育·(中国)股份有限公司官网 are switched synchronously (such as the data bus of the CPU, address bus, etc.) Noise The strength of SSN and ground rebound also depends on the characteristics of the I/O integrated circuit, the impedance 华体会体育·(中国)股份有限公司官网 of the power supply layer and the plane layer, and the layout and wiring 华体会体育·(中国)股份有限公司官网 of high-speed equipment

华体会体育·(中国)股份有限公司官网 board

2.4. Crosstalk
Crosstalk is the coupling between two signal lines Capacitive coupling induces coupling current, while inductive coupling generates coupling voltage Crosstalk noise originates from electromagnetic coupling between signal lines, between signal system and power distribution system, and between through holes Crosstalk may cause incorrect clock, intermittent data error, etc, It affects the transmission quality of adjacent signals In fact, we do not need to completely eliminate cross entanglement, as long as it is controlLED within the range that the system can withstand P, the carbon black layer, the distance between signal lines, the power characteristics of the driver and receiver, and the baseline termination method all have certain effects on crosstalk
2.5 Overshoot and Undershoot
Overshoot is a peak or valley value exceeding the set voltage Kick down refers to that the next wave trough or peak exceeds the set voltage Overrush assembly will lead to protection diode work, leading to its premature failure Excessive undershoot can cause spurious clock or data errors (misoperations).
2.6 Ringing and Rounding
Oscillation is the repeated overshoot and undershoot.  The signal oscillation is caused by the transitional inductance and capacitance on the line, which belongs to the under damping state, while the surrounding vibration belongs to the over damping state Oscillations and circular oscillations, like reflections, are caused by many factors and can be reduced by appropriate termination, but cannot be completely eliminated
2.7 Ground bounce noise and return noise
When there is a large current surge in the circuit, which will cause ground level rebound noise For example, when a large number of chip outputs are turned on at the same time, large transient current will flow through the power plane, chip package and power supply of the chip and circuit board. The inductance and resistance of the plane will cause power noise, which creates voltage fluctuations and changes in the true ground plane (OV), which will affect the behavior of other components The increase of load capacitance, the decrease of load resistance, the increase of grounding inductance, and the increase of switching devices will lead to the increase of grounding bounce Due to the division of the ground plane (including power supply and ground), When the digital signal reaches the analog grounding area, ground plane return noise will be generated SIMilarly, the power plane can also be divided into two 5 V, 3.3 V, 5 V, etc Therefore, in multi voltage 华体会体育·(中国)股份有限公司官网 design, special attention should be paid to bounce noise and return noise in the ground plane
3. Signal integrity solutions
The signal integrity problem is not caused by a single factor The main signal integrity problems include reflection, ringing, ground bounce, crosstalk, etc Crosstalk and reflection are mainly introduced below
3.1 Crosstalk Analysis
Crosstalk refers to the undesired voltage noise interference on adjacent transmission lines due to electromagnetic coupling when a signal propagates on a transmission line.  Excessive crosstalk may lead to incorrect circuit triggering, resulting in the system not working properly Because the crosstalk is inversely proportional to the line spacing, it is proportional to the parallel length of the line Crosstalk varies with circuit load For the same topology and cabling, the greater the load, the greater the crosstalk Crosstalk is proportional to signal frequency In digital circuits, the edge change of the signal affects crosstalk The faster the edge changes, the greater the crosstalk
It can be summarized into the following methods to reduce crosstalk:
1) Reduce the transition rate of the signal edge if possible.  When selecting equipment, under the condition of meeting the design specifications, try to select slow speed equipment and avoid mixing different types of signals, because fast changing signals have potential risk of crosstalk to slow changing signals
2) The crosstalk generated by capacitive coupling and inductive coupling increases with the increase of the load impact of the interfered line
3) When the wiring conditions permit, so as using the 3W principle (the distance between traces must be a single trace width) 3 times or the distance between traces must be greater than 2 times the width of a single trace) A more effective way is to isolate the conductors with a ground wire
4) Inserting a ground wire between adjacent signal wires can also effectively reduce capacitive crosstalk.  This ground wire requires every quarter wavelength
5) It is difficult to suppress inductive coupling.  It is necessary to reduce the number and area of loops as much as possible to avoid signal loops sharing the same conductor
6) The signal layer traces of two adjacent layers should be vertical
7) The surface layer has only one reference layer Therefore, signals more sensitive to crosstalk should be placed in the inner layer as far as possible
8) Through termination, the far end, near end and terminal impedance of the transmission line match with the transmission line, which can greatly reduce crosstalk and reflection interference
The above is the explanation given by the editor of 华体会体育·(中国)股份有限公司官网 circuit board company. If you want to know more about 华体会体育·(中国)股份有限公司官网A, you can go to our company's home page to learn about it. In addition, our company also sells various circuit boards,
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